FIG. 1 schematically illustrates an exemplary differential colpitts voltage controlled oscillator (VCO) 100. The differential colpitts VCO 100 is generally well known to those skilled in the art. The VCO 100 of FIG. 1 may include differential pair transistors T1 and T2, and a tank of inductors L1 and L2 and varactors C3 and C4. The transistor pair T1 and T2 may be cross coupled such that the drain of one transistor is operatively coupled to the gate of the other transistor. The transistors T1 and T2 may be biased by respective bias current sources Ibias1 and Ibias2. The drain terminals of transistors T1 and T2 may form the two output terminals O/P1 and O/P2 of the VCO 100. The source terminals of transistors T1 and T2 may be operatively coupled to nodes 122 and 124, respectively. A resonator circuit of the VCO 100 may include the series of inductors L1 and L2 and the series of varactor C3 and C4. A supply voltage Vdd (operatively coupled at the centre tap of the inductors L1 and L2) and a control voltage Vcontrol (operatively coupled in between the varactors C3 and C4) may control the output voltage swing and frequency.
The VCO 100 may also include capacitors C11 and C12 that form a capacitive voltage divider, where capacitor C11 may be operatively coupled to node 122 and drain terminal of the transistor T1, and capacitor C12 may be operatively coupled between node 122 and the ground. Similarly, capacitors C21 and C22 may form a capacitive voltage divider, where capacitor C21 may be operatively coupled to node 124 and drain terminal of the transistor T2, and capacitor C22 may be operatively coupled between node 124 and the ground.
For some applications, it may be desirable that the output voltage of the VCO 100 has a relatively higher voltage swing. For a given frequency, higher output voltage swing may increase a slew rate of the output voltage, and thus may result in relatively lower phase noise. An increase in the output voltage swing may be achieved, for example, by increasing the supply voltage Vdd, appropriately tuning one or more inductors and/or capacitors of VCO 100, and/or the like.
Also, with improvements in integration of semiconductor devices and developments in semiconductor manufacturing technology, thin oxide based low voltage devices are increasingly used in various applications. For example, thin oxide based low voltage transistors are increasingly used in radio frequency (RF) applications, which may require the transistors to operate at GHz frequencies. To ensure faster switching at GHz frequencies, the transistors T1 and T2 may be low voltage thin oxide transistors, i.e., may operate at a relatively low operating voltage (e.g., as compared to thick oxide devices rated for higher operating voltage). Such low voltage transistors, by virtue of being based on thin gate oxide, may be able to withstand a relatively lower level of stress voltage.
For the purpose of this disclosure and unless otherwise mentioned, a maximum stress tolerance voltage of a transistor may refer to approximately a maximum voltage that any two terminals of a transistor may be able to tolerate or withstand, without stressing the transistor (e.g., without adversely affecting one or more intrinsic characteristics of the transistor, such as mobility, threshold voltage of the transistor, intrinsic noise traits etc). For example, for a given submicron CMOS process, the operating voltage of transistors T1 and T2 may be about 1.2 volts (V), and the transistors T1 and T2 may have a safety margin of about 20%. Accordingly, the maximum stress tolerance voltage of transistors T1 and T2 may be about 1.4 V. That is, if the maximum voltage across any two terminals of transistors T1 and T2 (e.g., Vgs, Vgd, Vds) exceeds 1.4 V, the transistor is assumed to be operating under stress, which may degrade the performance (e.g., degrade the yield and noise) of the transistor, thereby degrading the phase noise of the VCO.
As previously discussed, for some applications, it may be desirable to have a higher output voltage swing of the VCO 100, for a given frequency of oscillation. However, if the output voltage swing is increased (e.g., by increasing Vdd), the maximum voltage experienced across any two terminals of the transistor T1 and/or T2 may also increase, and may exceed the maximum stress tolerance voltage of the transistors. For example, for nominal values of various components of the VCO 100 and for an output voltage swing of 1.2 V, the voltage swing of Vgs and/or Vds of the transistors T1 and T2 may exceed 1.4 V for about 15% of the duty cycle time. Thus, in case the transistors T1 and T2 are thin oxide low voltage transistors with a maximum stress tolerance voltage of 1.4 V, the transistors T1 and T2 may be in stress for about 15% of time the VCO is oscillating. The amount and duration of stress on the transistors may increase further with a further increase in the output voltage swing. For example, the transistors T1 and T2 may be in stress for about 22% of the duty cycle time for an output voltage swing of about 1.3 V
Thus, the VCO 100 with thin oxide low voltage transistors T1 and T2 may not be able to handle a relatively large output voltage swing (e.g., output voltage swing of 1.2 V or more) without stressing the transistors T1 and T2.